1. Field of the Invention
The invention relates to a liquid crystal display; in particular, to a source driver applied in the liquid crystal display having the design of two pairs of channels sharing four digital/analog converting modules to save the chip usage area.
2. Description of the Related Art
In recent years, with the development of display technology, various novel types of display apparatus having different functions and advantages are shown in the market. For a general liquid crystal display, the liquid crystal driving chip including a source driving chip and a date driving chip play very important roles.
Please refer to FIG. 1. FIG. 1 illustrates a structure schematic diagram of the conventional source driver. As shown in FIG. 1, in the conventional source driver SG, after the a digital data signal Dn is inputted to a first latch module LAT1 and a second latch module LAT2, the digital data signal Dn will be divided into Dn1 and Dn2 and Dn1 and Dn2 will be transmitted to a first level shifting module LS1 corresponding to a first channel CH1 and a second level shifting module LS2 corresponding to a second channel CH2 respectively. Wherein, the output terminal of the first level shifting module LS1 corresponding to a first channel CH1 is coupled to a first P-type digital/analog converting module PDAC1 and a second P-type digital/analog converting module PDAC2 respectively; the output terminal of the second level shifting module LS2 corresponding to a second channel CH2 is coupled to a first N-type digital/analog converting module NDAC1 and a second N-type digital/analog converting module NDAC2 respectively.
Next, a high-voltage multiplexer MUX1 corresponding to the first channel CH1 selectively outputs an analog data signal An11/An12 received from the first P-type digital/analog converting module PDAC1 and the second P-type digital/analog converting module PDAC2 to a polarization multiplexer POLMUX; a high-voltage multiplexer MUX2 corresponding to the second channel CH2 selectively outputs an analog data signal An21/An22 received from the first N-type digital/analog converting module NDAC1 and the second N-type digital/analog converting module NDAC2 to the polarization multiplexer POLMUX. Then, the polarization multiplexer POLMUX will selectively output the analog data signals An11/An12 and An21/An22 to the first channel CH1 or the second channel CH2 through a first amplifying and buffer module OPBU1 or a second amplifying and buffer module OPBU2.
From above, it can be known that for the conventional source driver SG having two sets of Gamma values, four digital/analog converting modules (for example, the first P-type digital/analog converting module PDAC1, the second P-type digital/analog converting module PDAC2, the first N-type digital/analog converting module NDAC1 and the second N-type digital/analog converting module NDAC2) should be correspondingly disposed for every two adjacent channels (for example, the first channel CH1 and the second channel CH2) to meet the practical operation requirements of the conventional source driver SG. However, this will also occupy more chip area, so that the volume of the chip cannot be further reduced.